Analysis of the current path for a vertical NAND flash cell with program/erase states

As cell threshold voltage (V-th) increases, the dominant current path moves from the front-side to back-side in vertical NAND (V-NAND). It is a new phenomenon which has been not observed in planar flash cells until now. In this paper, the main reason for the current path change with cell Vth variation in a V-NAND structure is studied for the first time. A capacitive coupling model is suggested for analysis of the change of channel location. Feasibility and characteristics of the suggested model are investigated with device simulations. Electric field induced by the back side fringing e-field and trap charge modulates the channel location in V-NAND flash memory.