Charge storage efficiency (CSE) effect in modeling the incremental step pulse programming (ISPP) in charge-trapping 3D NAND flash devices
international electron devices meeting, 2015.
A CSE (charge storage efficiency) model is proposed to explain the origin of ISPP slope degradation for various charge-trapping NAND Flash devices. Experimentally it is often observed that the programming window is generally degraded as device dimension scales , suggesting a strong size effect. Through our model analysis, it is clarifi...More
Full Text (Upload PDF)
PPT (Upload PPT)