Probe-Pad Placement for Prebond Test of 3-D ICs

IEEE Transactions on Components, Packaging and Manufacturing Technology(2016)

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摘要
3-D integrated circuits (3-D ICs) are emerging as a promising alternative to continue the scaling trajectory. They need to be tested before bonding (prebond) to ensure high stack yields. Several techniques exist for prebond test of 3-D ICs, and all of them require large probe pads for power delivery. We present the first probe-pad-aware 3-D IC placement framework, and this provides up to a 2% redu...
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关键词
Probes,Through-silicon vias,Layout,Built-in self-test,Metals
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