NMOS contact engineering for CMOS scaling
international workshop on junction technology, pp. 44-49, 2015.
The 10−7 nm CMOS nodes require that ρc be reduced to u003c 2E-9 Ω.cm2. Fermi level for most metals is pinned at mid-gap, resulting in a challenge to decrease SBH. There are several implant solutions, such as thermal implants, that can be leveraged to benefit the FinFET doping of SDE, SD and contact module for scaled CMOS.
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