Design and Implementation of ARM9 Compatible Microprocessor Using FPGA

With the recently increased demand on the high performance and efficiency microprocessor, there have been many studies on new implementation methodologies. In this paper, we implemented a microprocessor to provide the basis for studies on high performance and efficiency microprocessor. The implemented microprocessor consists of five-stage pipeline, which accounts for 75% of all ARM9 instruction. When this microprocessor was synthesized using Quartus II, 5,243 logic elements were used. The microprocessor operates at up to 50MHz on the FPGA board used in our experiment. In addition to the microprocessor, peripheral devices such as frequency synthesizers, memories, timers and non-synchronized transmitters/receivers were also configured. The operations of the microprocessor and peripheral devices were verified through various test programs. The purpose of this study is to provide basis for study on multi-core microprocessor using emulation by accumulating microprocessor implementation technologies regarding characteristics of FPGA.