PMOS contact resistance solution compatible to CMOS integration for 7 nm node and beyond
symposium on vlsi technology, pp. 1-2, 2016.
We report a PMOS contact resistivity (pc) improvement strategy by forming Ge-rich contact interface which is compatible to Ti/Si(Ge) system and CMOS integration flow. Short pulsed (nsec) laser anneal and advanced treatment during pre-clean have shown to be effective to segregate Ge towards SiGe surface resulting in PMOS ρc improvement. Wi...More
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