A 7nm CMOS platform technology featuring 4^th generation FinFET transistors with a 0.027um² high density 6-T SRAM cell for mobile SoC applications

Shien-Yang Wu,C.Y. Lin, M.C. Chiang,Jhon-Jhy Liaw,J.Y. Cheng,Shu-Tine Yang,Ching-Wei Tsai, P.N. Chen,T. Miyashita,Chih-Sheng Chang,V.S. Chang, K.H. Pan, Jyh-Huei Chen, Y.S. Mor, K.T. Lai, C.S. Liang,Huan-Neng Chen,S.Y. Chang, Chrong Jung Lin, C.H. Hsieh, R.F. Tsui, C.H. Yao,Chun-Kuang Chen,R. Chen,C.H. Lee,H.J. Lin,Chih-Yang Chang,Kuang-Hsin Chen,Ming-Huan Tsai,K.S. Chen,Y. Ku,S. M. Jang

2016 IEEE International Electron Devices Meeting (IEDM)（2016）

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摘要

For the first time, a leading edge 7nm CMOS platform technology for mobile SoC applications is presented. This technology provides >3.3X routed gate density and 35%∼40% speed gain or >65% power reduction over our 16nm FinFET technology. A fully functional 256Mb SRAM test-chip with the smallest high density SRAM cell of 0.027um ² is demonstrated down to 0.5V. The 4 ^th generation FinFET transistors are optimized with device mismatch reduction by 25%∼35% and multi-Vt device options to enable low power and high performance design requirements.

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关键词

high performance design requirements,low power design requirements,functional SRAM test-chip,routed gate density,6-T SRAM cell,4th generation FinFET transistors,CMOS platform technology,mobile SoC applications,size 7 nm,size 16 nm,storage capacity 256 Mbit

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A 7nm CMOS platform technology featuring 4th generation FinFET transistors with a 0.027um2 high density 6-T SRAM cell for mobile SoC applications

A 7nm CMOS platform technology featuring 4^th generation FinFET transistors with a 0.027um² high density 6-T SRAM cell for mobile SoC applications