Nested interconnect macro electrical yield improvement for advanced triple patterning integration
2017 28th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)(2017)
摘要
For metal pitches below 50nm, triple patterning (LELELE) integration is utilized in most advanced technologies to build the Cu interconnect. This integration relies on etch to shrink to the target critical dimension. As a result of high iso-dense bias in conventional etch process, nested serpentine structures formed by different metal colors show massive shorts that limit defect density yield. In this paper, several approaches in improving the isodense bias, as well as improving the nested serpentine electrical yield will be discussed.
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关键词
Etch Iso-Dense CD Bias,nested serpentine structures,triple patterning (LELELE)
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