A continuous-time digital IIR filter with signal-derived timing, agile power dissipation and synchronous output

We present the first continuous-time digital IIR filter with power consumption tracking the input activity and varying by over 50×, resulting in a FoM varying from 2.5iJ to 0.05ÍJ. Only two tapped delays are used for a sixth-order filter. The 1.2 V 65nm CMOS prototype achieves very high stopband rejection and includes an output converter to synchronous mode, allowing integration with discrete-time systems.