Plasticine: A Reconfigurable Accelerator for Parallel Patterns
IEEE Micro, pp. 20-31, 2018.
Plasticine is a new spatially reconfigurable architecture designed to efficiently execute applications composed of high-level parallel patterns. With an area footprint of 113 mm2 in a 28-nm process and a 1-GHz clock, Plasticine has a peak floating-point performance of 12.3 single-precision Tflops and a total on-chip memory capacity of 16 ...More
Full Text (Upload PDF)
PPT (Upload PPT)