Plasticine: A Reconfigurable Accelerator for Parallel Patterns

Raghu Prabhakar
Raghu Prabhakar
Yaqi Zhang
Yaqi Zhang
David Koeplinger
David Koeplinger
Matthew Feldman
Matthew Feldman

IEEE Micro, pp. 20-31, 2018.

Cited by: 3|Views35
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Abstract:

Plasticine is a new spatially reconfigurable architecture designed to efficiently execute applications composed of high-level parallel patterns. With an area footprint of 113 mm2 in a 28-nm process and a 1-GHz clock, Plasticine has a peak floating-point performance of 12.3 single-precision Tflops and a total on-chip memory capacity of 16 ...More

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