Novel solutions to enable contact resistivity 2 for 5nm node and beyond

Kelly E Hollar
Kelly E Hollar
Samuel Swaroop Munnangi
Samuel Swaroop Munnangi
Yi-Chiau Huang
Yi-Chiau Huang
Xuebin Li
Xuebin Li
Hua Chung
Hua Chung

symposium on vlsi technology, 2018.

Cited by: 0|Views17

Abstract:

In this paper, we present a solution for NP [B]: 1.0x10 21 cm -3 for PSD epi). These new process technologies provide a pathway to achieve the target p c required for transistor performance in advanced logic devices.

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