Effects of a Capping Oxide Layer on Polycrystalline-Silicon Thin-Film Transistors Fabricated by Continuous-Wave Laser Crystallization

A tetraethyl-orthosilicate (TEOS) capping oxide was deposited by low-pressure chemical vapor deposition (LPCVD) on a 200-nm-thick amorphous Si (a-Si) film as a heat reservoir to improve the crystallinity and surface roughness of polycrystalline silicon (poly-Si) formed by continuous-wave laser crystallization (CLC). The effects of four thicknesses of the capping oxide layer to satisfy an antireflection condition, namely, 90, 270, 450, and 630 nm, were investigated. The largest poly-Si grain size of 2.5 × 20 µm2 could be achieved using a capping oxide layer with an optimal thickness of 450 nm. Moreover, poly-Si nanorod (NR) thin-film transistors (TFTs) fabricated using the aforementioned technique exhibited a superior electron field-effect mobility of 1093.3 cm2 V−1 s−1 and an on/off current ratio of 2.53 × 109.