Efficient Design and Optimization Method for Distributed Amplifiers

A novel design and optimization method for distributed amplifiers (DAs) is proposed to make the circuit design more convenient and efficient. This method combines artificial intelligence (AI) optimization with manual design by two loops, i.e., outer manual loop and inner AI loop. The layout design is followed by AI optimization to take more influencing factors such as parasitic effect into account for the practicability. A DA with three gain cells is designed and optimized in a standard 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology to verify the proposed method. With a chip area of only 0.55 mm 2 , the DA provides 9.8 dB average forward gain from 1 to 15.2 GHz. The output power at 1 dB output compression point is more than 7.7 dBm in the 2–14 GHz frequency band and the peak power-added efficiency (PAE) is 10.6%. The measurement results validate the proposed method as a robust DA design procedure for improving circuit performance and design efficiency.