Modeling of Charge Loss Mechanisms during the Short Term Retention Operation in 3-D NAND Flash Memories

Right after program, stored electrons in the shallow nitride trap level can be released less than a few seconds. By setting the delay between program and reading phase to as small as 10μs, we found that several mechanisms are mixed when stored electrons are emitted during short term retention of 3-D NAND Flash. For the first time, we have confirmed that the charge loss mechanisms consist of three mechanisms and have separated each mechanism. In particular, the vertical redistribution of electrons in the charge trap layer, observed only during short term, was analyzed for the first time. Short term retention data measured at various temperatures (25-115°C) and at several program verify levels (PV3, PV5, PV7) in solid (S/P) and checker-board patterns (C/P) were analyzed using our model. Finally, the activation energy (E _a ) of each mechanism was extracted by the Arrhenius law and the magnitudes of E _a were compared.