Chapter Seven - Introduction to Emerging SRAM-Based FPGA Architectures in Dark Silicon Era.
DARK SILICON AND FUTURE ON-CHIP SYSTEMS(2018)
摘要
The increased leakage power of deep-nano technologies in the one hand, and exponential growth in the number of transistors in a given die particularly in Field-Programmable Gate Arrays (FPGAs) have resulted in an intensified rate of static power dissipation as well as power density. This ever-increasing static power consumption acts as a power wall to further integration of transistors and has caused the breakdown of Dennard scaling. To meet the available power budget and preclude reliability challenges associated with high power density, designers are obligated to restrict the active percentage of the chip by powering off a selective fraction of silicon die, referred to as Dark Silicon. Several promising architectures have been proposed to enhance the static power and energy efficiency in FPGAs. The main approach in the majority of suggested architectures includes applying power gating to unused logic and routing resources and/or designing power-efficient logic and routing elements such as Reconfigurable Hard Logics as an alternative for conventional Look-up Tables. This study represents a survey on evolution of SRAM-based FPGA architectures toward the era of dark silicon.
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