Performance Enhancement of 3-D NAND Flash Featuring a Two-Step Dummy Wordline Program Waveform and Pair-Bitline Program Scheme

IEEE Transactions on Electron Devices, pp. 99-104, 2020.

Cited by: 0|Bibtex|Views18|DOI:https://doi.org/10.1109/TED.2019.2951460
EI WOS
Other Links: academic.microsoft.com

Abstract:

In this work, we report two performance enhancement schemes for single-gate vertical-channel (SGVC) 3-D NAND Flash. The first one features a programming (PGM) waveform where the bias of the dummy wordline (DWL) is raised in a two-step manner so that the resultant disturbance that the DWL and edge WL suffer is appreciably alleviated. The s...More

Code:

Data:

Your rating :
0

 

Tags
Comments