A 40gb/S Low Power Transmitter With 2-Tap Ffe And 40:1 Mux In 28nm Cmos Technology

2019 IEEE 13TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)(2019)

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摘要
This paper introduces a low power NRZ transmitter with 2-tap multiple-FFE operating at 40Gb/s. The transmitter incorporates 3-stage MUX, a tailless CML driver and a resistance calibration system. Simplifying low speed MUX, modifying high speed MUX structure and adopting tailless CIVIL save a lot of power and improve signal quality. The simulation results show that the design can work at 40Gb/s with a -14.8 dB RLGC channel in 28nm CMOS technology. The simulation power consumption is 16.83 mW under 1.05V supply.
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关键词
CMOS technology,low power NRZ transmitter,3-stage MUX,tailless CML driver,resistance calibration system,high speed MUX structure,power consumption,low speed MUX structure,2-tap multiple-FFE,multiple-FFE operation,power 16.83 mW,voltage 1.05 V,size 28.0 nm,bit rate 40 Gbit/s
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