Analog and radio-frequency performance of nanoscale SOI MOSFET for RFIC based communication systems

Fully-Depleted (FD) Silicon-on-Insulator (FD SOI) MOS structures have attained remarkable attention due to its immunity over various short-dimension effects and lesser complexity in design as compared to other MOS structures like FinFET. In this work, Dual-Metal-Insulated-Gate (DMIG) technique based FD SOI MOSFETs have been analyzed for the study of low power Analog/RF applications. It has been found that the proposed hetero-gate-dielectric based DMIG source-engineered (HGD-DMIGSE) FD SOI MOSFET offers higher transconductance that allows higher gain and lowers the capacitive effects with broad-range of cutoff frequency as compared to available devices at same technology node. In next, the performance of the studied MOSFET has also been analyzed on the basis of admittance Y-parameters in order to investigate the device behaviour at higher frequencies. Further, for the first time, a current-source CMOS-inverter-amplifier has been designed using proposed HGD-DMIGSE FD SOI MOSFET. All these studies have been performed using ATLAS™ TCAD simulator.