SafeTPU: A Verifiably Secure Hardware Accelerator for Deep Neural Networks

2020 IEEE 38th VLSI Test Symposium (VTS)(2020)

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摘要
We present Safe-TPU, a framework for secure computations of Deep Neural Networks (DNNs) in untrusted hardware corrupted by Trojans or fault injection attacks. This work leverages previous advances on interactive proof (IP) systems for verifying, at run-time, the correctness of a neural network’s computations, and makes three new contributions: (1) We present a Trojan resilient DNN hardware accelerator based on interactive proofs; (2) We introduce new protocol enhancements that significantly reduce the space and time required to generate proofs; and (3) we propose an implementation of Safe-TPU with high parallelism and reuse of existing resources already deployed in the baseline DNN accelerator. We prototype Safe-TPU on an FPGA and analyze its security guarantees. Experimentally, we show that Safe-TPU’s area overhead is small (28%) over the baseline DNN accelerator and is 3.15× faster than state-of-the-art, while at the same time, Safe-TPU guarantees to catch, with high probability, any incorrect computations.
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关键词
safe-TPU area overhead,security guarantees,baseline DNN accelerator,interactive proofs,Trojan resilient DNN hardware accelerator,neural network,interactive proof systems,fault injection attacks,untrusted hardware,secure computations,deep neural networks,verifiably secure hardware accelerator,SafeTPU,incorrect computations
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