Low Dark Current and Low Noise 0 . 9 m Pixel in a 45 nm Stacked CMOS Image Sensor Process Technology

A 0.9 m pixel with well-balanced light and dark performance by making full use of a highly manufacturable 45 nm advanced technology incorporated with stacked CMOS image sensor (CIS) is presented. The 45 nm advanced technology is desirable for submicron pixel generation because of tighter design rule and higher controllability for process variation. In addition, the flexibility of stacked CIS process improves pixel performance. In this work, we demonstrated low dark current of 3.2 e/s at 60 °C, ultra-low read noise of 0.90 e rms, a high full well capacity (FWC) of 4,100 e, and blooming free in a 0.9 m pixel with pixel supply voltage of 2.8 V.