Benchmarking and Optimization of Spintronic Memory Arrays

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits（2020）

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摘要

In this article, we present a cross-layer optimization and benchmarking of various spintronic memory devices, including spin-transfer-torque magnetic random access memory (STT-MRAM), spin-orbit-torque (SOT) MRAM, voltage-controlled exchange coupling (VCEC) MRAM, and magnetoelectric (ME) MRAM. Various material, device, and circuit parameters are optimized to maximize array-level READ and WRITE perf...

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关键词

Transistors,Magnetic tunneling,Spintronics,Layout,Benchmark testing,Performance evaluation

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