Benchmarking and Optimization of Spintronic Memory Arrays
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, pp. 9-17, 2020.
EI WOS
Abstract:
In this article, we present a cross-layer optimization and benchmarking of various spintronic memory devices, including spin-transfer-torque magnetic random access memory (STT-MRAM), spin-orbit-torque (SOT) MRAM, voltage-controlled exchange coupling (VCEC) MRAM, and magnetoelectric (ME) MRAM. Various material, device, and circuit paramete...More
Code:
Data:
Tags
Comments