Trading Latency for Compute in the Network
SIGCOMM '20: Annual conference of the ACM Special Interest Group on Data Communication on the applications, technologies, architectures, and protocols for computer communication Virtual Event USA August, 2020(2020)
摘要
This paper proposes a new heterogeneous approach to programmable architecture that extends the capabilities of programmable switch ASICs with FPGAs. It identifies the key challenges in building a heterogeneous network architecture, and presents a concrete design and implementation based around a proof-of-concept data deduplication application. Our prototype demonstrates the use of a programmable network switch and FPGAs to accelerate storage fingerprinting, running at 10G and 100G at line rate. Our approach is modular, scalable and generalizes to a wide range of applications.
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