A 3.2mw Sar-Assisted Ct Delta Sigma Adc With 77.5db Sndr And 40mhz Bw In 28nm Cmos

This paper presents a SAR-assisted Continuous-time Delta Sigma (CT Delta Sigma) ADC, which combines the energy efficiency of SAR ADCs with the relaxed driving requirements of CT Delta Sigma ADCs, as well as similar anti-alias filtering. When clocked at 2.4GHz, the ADC achieves 77.5dB SNDR in 40MHz BW. It consumes 3.2mW, resulting in a state-of-the-art Walden FoM of 6.5fJ/cs and a Schreier FOM of 178.5dB.