Convergence Processor: Standard And Custom Ip In An Innovative Soc Design For Broadband Residential Applications

We present the Convergence Processor, an innovative component that integrates a high performance 32-bit RISC core, a custom IP core optimised for header-processing and other blocks for specific communication interfaces required for the delivery of broadband residential applications. The component is a System-on-Chip supporting the real time processing of packets and protocol data units from various networking interfaces. Its target is to be used as the central processing unit for various multifunctional networking systems including RGs, IADs, STBs, and IP PBXs. We focus on the system architecture and the component reusable IP cores, namely the header processor, the security engine, the data-handling unit and the open source 32-bit RISC LEON CPU. As communication interfaces, the chip integrates 802.3 MAC, ATM, AAL2, AAL5, HDLC, VART and a generic packet interface for voice and video processing peripherals. It has been prototyped using a large XILINX Virtex FPGA and is currently being transferred to UMC 0.18u CMOS technology targeting 200MHz operation for the CPU and 100MHz for the rest of the system. The chip supports a total link capacity of 900Mbps and is optimised to deliver an aggregate sustain rate of up to 100Mbps of multimedia traffic with acceptable Quality of Service.