Novel Ultra-Low-Voltage Flip-Flops: Near-V th Modeling and VLSI Integration

2021 IEEE 39th International Conference on Computer Design (ICCD)（2021）

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摘要

This paper presents two novel ultra-low-voltage (ULV) Single-Edge-Triggered flip-flops (SET-FF) based on the True-Single-Phase-Clocking (TSPC) scheme. By exploiting the TSPC principle, the overall energy efficiency has been improved compared to the traditional flip-flop designs while providing fully static, contention-free functionality to satisfy ULV operation. At 0.5V near-Vth level i...

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关键词

Measurement,Conferences,Voltage,Very large scale integration,Shift registers,CMOS technology,Energy efficiency

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