Chapter Nine - Power-gating in NoCs.
Adv. Comput.(2022)
摘要
Driven by trends such as machine learning, the internet of things and 5G, it is increasingly common to see computer chips with tens to hundreds of processing cores, ranging from general purpose CPUs to application specific accelerators. All processing cores must share data and coordinate their operation, leading to contention and performance penalties. Communication between cores is handled by a network-on-chip (NoC). However, NoCs for modern chips contribute considerably to the chips overall power budget. Thus, the NoC power consumption is critical for ensuring that chips can continue to keep pace with increasing demand. Although NoCs are over-provisioned to handle worst-case scenarios, the NoCs routers are quite often underutilized, making them a promising candidate for power-gating. However, applying power-gating to the on-chip routers has several challenges. In this chapter, we present different power-gating solutions to alleviate the challenges.
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power-gating
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