Parasitic-Aware Modelling for Neural Networks Implemented with Memristor Crossbar Array
2021 IEEE 14th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)(2021)
Abstract
This paper presents a parasitic-aware modelling approach called alpha beta-matrix model for the simulation of neural network (NN) implemented with memristor crossbar array. The line resistance, which is the key parasitic in a memristor crossbar array is analyzed and incorporated into the model. The proposed method estimates the line resistance IR drop with computation complexity of O (mn), in contrast to O(m(2)n(2)) required by the classical matrix based Kirchhoff's Current Law (KCL) equations solver. The impact of the crossbar array parasitics to the vector-matrix multiplication (VMM) computation and multi-layer NN classification accuracy are also analyzed. The advantages of the proposed parasitic-aware model are demonstrated through an example of 2-layer perceptron implemented with resistive random access memory (RRAM) crossbar array for MNIST written digits classification. 97.3% classification accuracy is achieved on 64x64 6-bit RRAM crossbar arrays. Compared to the KCL solver, the classification accuracy degradation is less than 0.4% with line resistance up to 4.5 Omega.
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Key words
Analog computing,memristor crossbar,line resistance,vector matrix multiplication
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