Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage
2022 International Conference on Field-Programmable Technology (ICFPT)(2022)
摘要
This research aims to explore the tradeoffs between routing flexibility and hardware resource usage, ultimately reducing the resource usage of our CGRA architecture while maintaining compute efficiency. we investigate statistics of connection usages among switch blocks for benchmark DFGs, propose several CGRA architecture with a reduced connection, and evaluate their hardware cost, routability of DFGs, and computational throughput for benchmarks. We found that the topology with horizontal plus diagonal connection saves about 30% of the resource usage while maintaining virtually the same routing flexibility as the full connectivity topology.
更多查看译文
关键词
CGRA,Routing architecture,Design space exploration,HPC,RTL simulation
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要