A Class-C Injection-Locked Tripler with 48 dB Sub-Harmonic Suppression and 15 fs Additive RMS Jitter in 0.13μm BiCMOS Process.

We present a low phase noise 4.5-to-6.5 GHz injection-locked oscillator-based frequency tripler (ILT) from an ultra-low jitter 1.5-to-2.16 GHz clock source. Class-C biasing is employed in the digitally controlled LC oscillator (LC-DCO) and the injection circuit to simultaneously achieve low phase noise in the LC-DCO and improve the third harmonic injection strength. Using BJT in the injection transistors and DCO greatly improves the low-frequency phase noise performance of the ILT. Fabricated in a $0.13 \mu \mathrm{m}$ BiCMOS process, the ILT has a measured tuning range of 4.5-to-6.5 GHz, with a jitter tracking bandwidth of 25 MHz for sub-harmonic injection. The ILT demonstrates good sub-harmonic rejection ratios SHRR 1 and SHRR 2 as 48 dB and 58 dB, respectively. The ILT adds 15 fs additional rms jitter to an input clock source with rms jitter of 68 fs.