Mixed-Signal Integrated Circuit for Direct Raised-Cosine Filter Waveform Synthesis of Digital Signals Up to 24 GS/s in 22 Nm FD-SOI CMOS Technology.

Pulse shaping for signal transmission over bandwidth limited channels and for sensor systems is very important to control intersymbol interference and to comply with spectrum emission mask specifications by reducing the occupied bandwidth. In this work, an efficient, low-power concept for digital-to-waveform conversion is presented on a 22 nm CMOS node. A key characteristic is the approximation concept of a raised-cosine filter for waveform synthesis by non-binary weighting in the digital-to-analog converter (DAC) keeping hardware complexity and thus power consumption low. Due to the proposed pulse shaping method, spectral side lobes of a pseudo-random bit stream example can be reduced by more than 20 dB at 24 GS/s and a power consumption of only about 30 mW. In summary, this concept replaces high-resolution DACs or analog filters, respectively, in pulse shaping circuits by simple CMOS logic and an application-centric DAC.