Electrical Properties of Silicon Nanowires Schottky Barriers Prepared by MACE at Different Etching Time

Abstract This article focused on the electrical characterization of silicon nanowires Schottky barriers following structural analysis of nanowires grown on p-type silicon by Metal (Ag) Assisted Chemical Etching (MACE) method distinguished by their different etching time (5min, 10min, 25min). The SiNWs are well aligned and distributed almost uniformly over the surface of a silicon wafer. In order to enable electrical measurement on the silicon nanowires device, Schottky barriers were performed by depositing Al on the vertically aligned SiNWs arrays. The electrical properties of the resulting Al/SiNWs diodes were characterized by current voltage (I-V) and capacity voltage (C-V) measurements. Unlike the conventional Schottky diode, symmetrical current-voltage (I-V) characteristics have been observed with a rectification ratio < 4. The metal-semiconductor-metal (M-S-M) model was used to analyze the (I-V) characteristics by including two Schottky barriers at the interface between metal and SiNWs. The electron transport behavior is explained by the thermionic field emission method (TFE) which added the effect of the tunneling current compared to the conventional thermionic emission theory. The capacitance-voltage C-V characteristics of SiNWs depend on the bias voltage showing that the samples have an obvious space charge region. Symmetric behavior also appears in the C –V curves that confirm the MSM model.