A Novel Compact Model of Gate Capacitance for SiC MOSFET with Easy Parameter Extraction Method

In this work, a novel compact model of gate capacitance for SiC MOSFET is proposed. It contains two nonlinear functions of gate-drain and gate-source capacitance respectively. The establishment of the model is based on the physical mechanism of MOS capacitance for accuracy, and the mathematical fitting methodology is utilized to quest for an easy-to-implement parameter extraction method. The proposed gate capacitance model is compact and of high convenience, which can be used in the SPICE model of SiC MOSFET. Finally, the model's accuracy is verified by double pulse tests.