Designing the Control Loop for Latching Current Limiters (LCL)

DC power systems find extensive applications in the automotive and aerospace industries, where there is a growing demand for higher voltage and current levels. Additionally, the utilization of DC power systems in microgrids is growing continuously. This increased adoption enhances the need for more efficient protective mechanisms to ensure reliable and secure operation. The latching current limiter (LCL) plays a crucial role in DC systems by serving as a protective barrier against overload. It functions as a safeguard, preventing excessive current from causing harm to sensitive circuitry and components. Implementing an LCL offers essential protection for these components, leading to extended lifespans and enhanced overall system reliability. A significant challenge in LCL development concerns the designing of the control loop. Traditional methods often rely on linearization and approximations, which can yield poor results. An alternative approach for control loop design involves practical methods, using the real circuits. This work introduces some experimental approaches to design the LCL control loop. The signal injection technique is used, in pulsed and continuous mode. The K-factor method is employed to define the compensator. The results are presented and compared, demonstrating the effectiveness of the proposed solution.