A 20μm Pixel-pitch, 60Me^- DROIC Based on CTIA for 640 x 512 Infrared Focal Plane Array

In this paper, a 20μm pixel-pitch, 60Me- charge handling capacity digital readout circuit (DROIC) based on capacitor feedback transimpedance amplifier (CTIA) for 640 x 512 infrared focal plane array (IRFPA) is presented. Compared to the direct injection (DI) structure, the CTIA structure is adopted, which offers higher injection efficiency and is not influenced by background light, thus achieving higher linearity. Furthermore, a two-stage quantization approach is employed to enhance the charge handling capacity compared to the traditional structure based on pulse frequency modulation (PFM). Considering the pixel size, the coarse quantization produces a 4-bit signal, while for fine quantization, a 12-bit digital signal is generated by four column-shared analog preprocessing circuit (APC) and a 12-bit successive approximation register (SAR) ADC. Based on the 0.18μm 1P6M process, the simulation results indicate that the nonlinearity of DROIC is 99.78 ^% , the pixel array power consumption is 233mW, and the dynamic range (DR) is 95.6dB.