Exploring the Effect of Gate Oxide Process on Electrical Performance of CMOS Device
CONFERENCE OF SCIENCE & TECHNOLOGY FOR INTEGRATED CIRCUITS, 2024 CSTIC（2024）
Key words
Device Performance,Gate Oxide,Optimization Process,Nitrogen Content,Process Parameters,Standard Conditions,Dielectric Constant,Nitride,Oxide Layer,Threshold Voltage,Thermal Annealing,Current Reduction,Gate Dielectric,H2 Concentration,Thick Oxide Layer,Gate Leakage,Nitrogen Distribution,Addition Of Dopants,Mean Time To Failure,Gate Dielectric Layer,Universal Curve,Device Gate,Oxidative Breakdown
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