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    摩

    摩根大通

    JPMorgan Chase
    企业
    896论文总数
    2万引用总数

    摩根大通集团(JPMorgan Chase & Co,NYSE:JPM;TYO:8634),业界称西摩或小摩,中国人习惯称之为“摩根银行"(MogenBank),总部位于美国纽约,总资产2.5万亿美元,总存款1.5万亿美元,占美国存款总额的25%,分行6000多家,是美国最大金融服务机构之一,摩根大通于2000年由大通曼哈顿银行及J.P.摩根公司合并而成,并分别收购芝加哥第一银行和贝尔斯登银行和华盛顿互惠银行。摩根大通是一家跨国金融服务机构及美国最大的银行之一,业务遍及60多个国家,包括投资银行,金融交易处理,投资管理,商业金融服务,个人银行业务等。 2017年6月,《2017年BrandZ最具价值全球品牌100强》公布 ,摩根大通银行排名第74位。

    论文量&引用量时间轴

    机构学者

    排序
    Marco Pistoia
    Marco Pistoia
    IBM Thomas J. Watson Research Center
    论文:35引用:0H-index:0
    ZhiZhuo Zhang
    ZhiZhuo Zhang
    论文:32引用:0H-index:0
    HaiBin Zhu
    HaiBin Zhu
    论文:25引用:0H-index:0
    Antigoni Polychroniadou
    Antigoni Polychroniadou
    Aarhus Univ
    论文:21引用:0H-index:0
    Daniel Borrajo
    Daniel Borrajo
    Computer Science and Engineering Department, Universidad Carlos III de Madrid;JPMorgan Chase & Co
    论文:18引用:0H-index:0
    Shouvanik Chakrabarti
    Shouvanik Chakrabarti
    University of Maryland College Park
    论文:18引用:0H-index:0
    Manuela Maria Veloso
    Manuela Maria Veloso
    Department of Computer Science, School of Computer Science, Carnegie Mellon University
    论文:17引用:0H-index:0
    Diana Farrell
    Diana Farrell
    JPMorgan Chase & Co
    论文:17引用:0H-index:0
    Ruslan Shaydulin
    Ruslan Shaydulin
    JPMorgan Chase & Co.
    论文:15引用:0H-index:0

    论文(898)

    年份
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    止
    排序
    1Cache What Lasts: Token Retention for Memory-Bounded KV Cache in LLMs
    Ngoc Bui,Shubham Sharma, Simran Lamba,Saumitra Mishra,Rex Ying

    Memory and computation remain core bottlenecks in long-horizon LLM inference due to the quadratic cost of self-attention and the ever-growing key-value (KV) cache. Existing strategies for memory-bounded inference, such as quantization, offloading, or heuristic KV eviction, either incur high orchestration costs or rely on unreliable attention-based proxies of importance. We propose TRIM-KV, a novel approach that learns each token’s intrinsic importance at creation time via a lightweight retention gate. Each gate predicts a scalar retention score that decays over time, reflecting the long-term utility of the token for a specific layer and head. Tokens with low scores are evicted when the memory budget is exceeded, ensuring that the cache always contains the most critical tokens. TRIM-KV is trained efficiently through distillation from a frozen LLM combined with a capacity loss, requiring only gate fine-tuning and adding negligible inference overhead. Across mathematical reasoning (GSM8K, MATH-500, AIME24), procedural generation (LongProc), conversational long-memory benchmarks (LongMemEval), and long-context understanding (LongBenchV2 and SCBench), TRIM-KV consistently outperforms strong eviction and learnable retrieval baselines, especially in low-memory regimes. Remarkably, it even surpasses full-cache models in some settings, showing that selective retention can serve as a form of regularization, suppressing noise from uninformative tokens. Qualitative analyses further reveal that learned retention scores align with human intuition, naturally recovering heuristics such as sink tokens, sliding windows, and gist compression without explicit design. Beyond efficiency, retention scores provide insights into layer- and head-specific roles, suggesting a new path toward LLM interpretability.

    ICLR 2026引用:15
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    2A 0.8395-Approximation Algorithm for the EPR Problem
    Anuj Apte, Eunou Lee, Kunal Marwaha,Ojas Parekh,Lennart Sinjorgo, James Sud

    We give an efficient 0.8395-approximation algorithm for the EPR Hamiltonian. Our improvement comes from a new nonlinear monogamy-of-entanglement bound on star graphs and a refined parameterization of a shallow quantum circuit from previous works. We also prove limitations showing that current methods cannot achieve substantially better approximation ratios, indicating that further progress will require fundamentally new techniques.

    2026European Symposium on Algorithms(2026)引用:8
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    3GPU-Parallelizable Randomized Sketch-and-Precondition for Linear Regression Using Sparse Sign Sketches
    Tyler Chen, Pradeep Niroula, Archan Ray, Pragna Subrahmanya,Marco Pistoia,Niraj Kumar

    A litany of theoretical and numerical results have established the sketch-and-precondition paradigm as a powerful approach to solving large linear regression problems in standard computing environments. Perhaps surprisingly, much less work has been done on understanding how sketch-and-precondition performs on graphics processing unit (GPU) systems. We address this gap by benchmarking an implementation of sketch-and-precondition based on sparse sign-sketches on single and multi-GPU systems. In doing so, we describe a novel, easily parallelized, rejection-sampling based method for generating sparse sign sketches. Our approach, which is particularly well-suited for GPUs, is easily adapted to a variety of computing environments. Taken as a whole, our numerical experiments indicate that sketch-and-precondition with sparse sign sketches is particularly well-suited for GPUs, and may be suitable for use in black-box least-squares solvers.

    20262026 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)(2026)引用:7
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    4ChartAgent: A Multimodal Agent for Visually Grounded Reasoning in Complex Chart Question Answering
    Rachneet Kaur, Nishan Srishankar,Zhen Zeng,Sumitra Ganesh

    Recent multimodal LLMs have shown promise in chart-based visual question answering, but their performance declines sharply on unannotated charts—those requiring precise visual interpretation rather than relying on textual shortcuts. To address this, we introduce ChartAgent, a novel agentic framework that explicitly performs visual reasoning directly within the chart’s spatial domain. Unlike textual chain-of-thought reasoning, ChartAgent iteratively decomposes queries into visual subtasks and actively manipulates and interacts with chart images through specialized actions such as drawing annotations, cropping regions (e.g., segmenting pie slices, isolating bars), and localizing axes, using a library of chart-specific vision tools to fulfill each subtask. This iterative reasoning process closely mirrors human cognitive strategies for chart comprehension. ChartAgent achieves state-of-the-art accuracy on the ChartBench and ChartX benchmarks, surpassing prior methods by up to 16.07% absolute gain overall and 17.31% on unannotated, numerically intensive queries. Furthermore, our analyses show that ChartAgent is (a) effective across diverse chart types, (b) achieves the highest scores across varying visual and reasoning complexity levels, and (c) serves as a plug-and-play framework that boosts performance across diverse underlying LLMs. Our work is among the first to demonstrate visually grounded reasoning for chart understanding using tool-augmented multimodal agents.

    2026ACL 2026(2026)引用:7
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    5Fault-tolerant Execution of Error-Corrected Quantum Algorithms
    Michael A. Perlin,Zichang He, Anthony Alexiades Armenakas, Pablo Andres-Martinez, Tianyi Hao,Dylan Herman,Yuwei Jin,Karl Mayer, Chris Self, David Amaro, Ciaran Ryan-Anderson,Ruslan Shaydulin

    Scaling up quantum algorithms to tackle high-impact problems in science and industry requires quantum error correction and fault tolerance. While progress has been made in experimentally realizing error-corrected primitives, the end-to-end execution of logical quantum algorithms using only fault-tolerant (FT) components has remained out of reach. We demonstrate the FT and error-corrected execution of two quantum algorithms, the Quantum Approximate Optimization Algorithm (QAOA) and the Harrow-Hassidim-Lloyd (HHL) algorithm applied to the Poisson equation, on Quantinuum H2 and Helios trapped-ion quantum processors using the [[7,1,3]] Steane code. For QAOA circuits on 5 and 6 logical qubits, we show performance improvements from increasing the number of QAOA layers and the number of T gates used to approximate logical rotations, despite increased physical circuit complexity. We further show that QAOA circuits with up to 8 logical qubits and 9 logical T gates perform similarly to unencoded circuits. For the largest QAOA circuits we run, with 12 logical (97 physical) qubits and 2132 physical two-qubit gates, we still observe better-than-random performance. Finally, we show that adding active QEC cycles and increasing the repeat-until-success limit of state preparation subroutines can improve the performance of a quantum algorithm, thereby demonstrating critical capabilities of scalable FT quantum computation. Our results are enabled by an FT logical T gate implementation with an infidelity of ∼ 2.6(4)×10^-3 and dynamic circuits with measurement-dependent feedback. Our work demonstrates near-break-even performance of complex, error-corrected algorithmic quantum circuits using only FT components.

    2026引用:6
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    合作机构(100)

    卡内基梅隆大学合作论文 16
    芝加哥大学合作论文 14
    马里兰大学合作论文 14
    罗汉普顿大学合作论文 12
    帝国理工学院合作论文 10
    俄亥俄州立大学合作论文 10
    牛津大学合作论文 10
    纽约大学合作论文 10
    康奈尔大学合作论文 10
    哥伦比亚大学合作论文 10

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