At the threshold to exascale computing, limitations of the MPI programming model become more and more pronounced. HPC programmers have to design codes that can run and scale on systems with hundreds of thousands of cores. Setting up accordingly many communication buffers, point-to-point communication links, and using bulk-synchronous communication phases is contradicting scalability in these dimensions. Moreover, the reliability of upcoming systems will worsen.
Mutual exclusion protects data structures in parallel environments in order to preserve data integrity. A lock being held effectively blocks the execution of all other threads wanting to access the same shared resource until the lock is released. This blocking behavior reduces the level of parallelism causing performance loss. Fine grained locking reduces the contention for the locks resulting in better throughput, however, the granularity, i.e. how many locks to use, is not straightforward. In large bucket hash tables, the best approach is to divide the table into blocks, each containing one or more buckets, and locking these blocks independently. The size of the block, for optimal performance, depends on the time spent within the critical sections, which depends on the table’s internal properties, and the arrival intensity of the queries. A queuing model is presented capturing this behavior, and an adaptive algorithm is presented fine-tuning the granularity of locking (the block size) to adapt to the execution environment.
Modern supercomputer architectures offer ever more power, but rely heavily on a hierarchical organization of resources.While internode communication can easily be handled by MPI, efficient usage of multi-core CPUs requires the programmer to parallelize a given problem using shared-memory programming models. Hybrid approaches to high scalability become ever more popular and are frequently very successful. Here, we will look at scheduling overheads of three different models. Hybrid approaches to high scalability become ever more popular and are frequently very successful.
Porting applications to a new system is a nontrivial job in the HPC field. It is a very time-consuming, labor-intensive process, and the quality of the results will depend critically on the experience of the experts involved. In order to ease the porting process, we propose a methodology to address an important aspect of software porting that receives little attention, namely planning support. When a scientific application consisting of many subroutines is to be ported, the selection of key subroutines greatly impacts the productivity and overall porting strategy, because these subroutines may represent a significant feature of the code in terms of functionality, code structure, or performance. They may also serve as indicators of the difficulty and amount of effort involved in porting a code to a new platform. The proposed methodology is based on the idea that a set of similar subroutines can be ported with similar strategies and result in a similar-quality porting. By viewing subroutines as data and operator sequences, analogous to DNA sequences, we are able to use various bio-informatics techniques to conduct the similarity analysis of subroutines while avoiding NP-complete complexities of other approaches. To further improve accuracy for porting, we also merged some other code metrics and costmodel metrics for similarity analysis to capture the internal code characteristics. In this dissertation, we describe our methodology, which includes presentation of a tool called Klonos. To evaluate the effectiveness of Klonos, we used it to conduct experiments to find strategies for porting of several scientific benchmarks and a large scientific application. Our experiment shows Klonos is very effective for providing a systematic porting plan to guide the users during their porting process of reusing similar porting strategies for similar code regions.
We present parallel algorithms to accelerate collision tests of rigid body objects for a high number of independent transformations as they occur in sampling-based motion planning and path validation problems. We compare various GPU approaches with a different level of parallelism against each other and against a parallel CPU implementation. Our algorithms require no sophisticated load balancing schemes. They make no assumption on the distribution of the input transformations and require no pre-processing. Yet, we can perform up to 1 million collision tests per second with our best GPU implementation in our benchmarks. This is about 2.5X faster than our reference multi-core CPU implementation and more than 18X faster than current single-core implementations.
Variable Privatization is an important technique that has been used by compilers to parallelize loops by eliminating storage-related dependences. In this paper, we present an approach that combines extracting synchronization-free slices available in program loops with variable privatization. This permits us to reduce the number of dependence relations and as a consequence to reduce the time complexity of algorithms aimed at extracting synchronization-free slices. This leads to enlarging the scope of the applicability of those algorithms and reducing the time required to parallelize loops. The scope of the applicability of the approach is illustrated by means of the NAS Parallel Benchmark suite. Results of a performance analysis for parallelized loops executed on a multi-core computer are presented. Received results are compared with those obtained by other loop parallelization techniques. The future work is outlined.
Image segmentation is required to run fast and without supervision to speed up subsequent processes such as object recognition or other high level tasks. General purpose computing on the GPU is a powerful tool to perform efficient image processing and has been applied to the image segmentation problem. However, state-of-the-art approaches still perform parts of the computations on the CPU requiring costly data exchange with the main memory. In this paper we suggest a fully unsupervised color image segmentation that runs completely on the GPU including the calculation of region features. We compare our results to a popular CPU-based and a recent GPU-based method and report a computation time advantage.
As a consequence of the immense computational power available in GPUs, the usage of these platforms for running data-intensive general purpose programs has been increasing. Since memory and processor architectures of CPUs and GPUs are substantially different, programs designed for each platform are also very different and often resort to a very distinct set of algorithms and data structures. Selecting between the CPU or GPU for a given program is not easy as there are variations in the hardware of the GPU, in the amount of data, and in several other performance factors. ÆminiumGPU is a new data-parallel framework for developing and running parallel programs on CPUs and GPUs. ÆminiumGPU programs are written in a Java using Map-Reduce primitives and are compiled into hybrid executables which can run in either platforms. Thus, the decision of which platform is going to be used for executing a program is delayed until run-time and automatically performed by the system using Machine-Learning techniques. Our tests show that ÆminiumGPU is able to achieve speedups up to 65x and that the average accuracy of the platform selection algorithm, in choosing the best platform for executing a program, is above 92%.
The numerical methods used to model complex geometries required by many scientific applications often favour the use of unstructured meshes and finite element discretisation methods over structured grid alternatives. This flexibility introduces complications, such as the management of mesh quality and additional computational overheads arising from indirect addressing [5]. Using the Finite Element Method for the numerical solution of PDEs, a posteriori error estimations on the PDE solution help evaluate a quality functional [4] and determine the low-quality mesh elements. Mesh adaptivity methods ([3], [1]) provide an important means to control solution error by focusing mesh resolution in regions of the computational domain when and where it is required.Adaptive algorithms are grouped into two main categories, h-adaptivity and r-adaptivity algorithms. The first category contains techniques which try to adapt the mesh by changing its topology. This can be done by removing existing mesh elements, a technique known as coarsening, increasing local mesh resolution by adding new elements, a procedure called refinement, or replacing a group of elements with a different group, which can be achieved through swapping. The second group of adaptive algorithms encompasses a variety of vertex smoothing techniques, all of which leave mesh topology intact and only attempt to improve quality by relocating mesh vertices. Algorithm 1 demonstrates the general procedure for the solution of a PDE on an adaptive mesh. A problem is said to be anisotropic if its solution exhibits directional dependencies. An anisotropic mesh contains elements which have some suitable orientation. In this case, the error estimation is given in the form of a metric tensor field M(x), i.e. a tensor which, for each point in the domain, represents the desired length and orientation of a mesh edge containing this point. Adapting a mesh so that it distributes the error uniformly over the whole mesh is equivalent to constructing a uniform mesh consisting of equilateral triangles with respect to the non-Euclidean metric M(x).
In the last five years GPU-computing has become a powerful means of high performance computing. This development drove instruction set extensions such as AVX for general purpose CPUs or even created new architectures, e.g. Intel's Many Integrated Core Architecture based on regular general purpose components stemming from the x86 world. GPUs and accelerators in general can be regarded as co-processors. If we go back 20 or 25 years we see a similar scenario with floating point co-processors (e.g. x87 unit). These special function units eventually merged into the general purpose processors' architectures. Since the introduction of Intel's MMX technology in 1997 we can witness a similar process for all kinds of media (signal, audio and video) processing. Since 2011 GPUs and CPUs are merging onto one die.
Pulsars are rapidly rotating neutron stars whose signal is received on Earth periodically. They are relatively newly discovered astronomical objects (the first was discovered only in 1967) and elusive ones: so far only two thousand of them are know. Their properties, especially their big mass and precise period, can be used to probe space and gravitation. This makes them important not only for astronomers, but for physicists and other scientists as well: the discovery of the first binary pulsar by Hulse and Taylor in 1973 [1] has been so important for proving general relativity and other aspects of gravitation that they won the 1993 Nobel prize for physics. Thus, being able to discover new pulsars is an important goal of current radio astronomy.The process of finding a new pulsar is, however, difficult and time consuming: it involves a brute-force search over hundreds of thousands of parameter combinations. Moreover, the amount of data that needs to be searched is huge: the input of a typical observation using a radio telescope like LOFAR [2] is in the order of hundreds of terabytes. During the process petabytes of intermediate results are produced and analyzed. Thus, searching for pulsars clearly is a big data problem.The challenges are not only limited to the amount of data that needs to be processed: the signal received from a pulsar is usually quite faint and can be completely covered by radio frequency interference and, even when there is no artificial noise, a long integration time may be necessary to properly detect its profile. There is, furthermore, the inter-stellar medium to take into account: typical effects of the interaction between the emission and the medium are dispersion, scintillation and scattering. And this is not the only interaction: if the pulsar is orbiting with a companion of some kind, the interaction between them modifies the signal and makes it even more difficult to detect from Earth.We propose to reduce the time necessary to search for new pulsars using many-core accelerators, e.g. modern GPUs. We design and implement the whole searching pipeline, using OpenCL to build the three most important computational kernels of this application: dedispersion, folding and the signal to noise computation. An overview of our pulsar searching pipeline is presented in Figure 1. Using our prototypical tool we are able to find pulsars in test data sets generated with Duncan Lorimer’s SIGPROC. To overcome one of the main problems of using accelerators, i.e. the expensive memory transfers between device and host memory, we keep all the intermediate results in device memory. Moreover we use auto-tuning, a technique that we know to be effective with many-core architectures [3], to identify which parameters are the best suited for each specific device used to run our prototype.
We present our framework for parallel simulations of hyperbolic partial differential equations on triangular grids. As a proofof- concept, we implemented the shallow water equations using a finite volume method together with the Riemann solvers of LeVeque and George [1] and multi-resolution geoinformation datasets. The results show a parallel fully adaptive simulation applied to the 2011 Tohoku tsunami fieldbenchmark. Efficient adaptivity is realized by grid-traversals which follow the Sierpiński space filling curve. A stack- and stream-based approach accounts for locality and cache efficiency by arranging the data exchange among cells. For tsunamis we used the normalized height mass exchange as adaptivity criterion in every time step. Therefore, if a certain refinement threshold is exceeded, the corresponding cells are refined by newest vertex bisection. Values falling below a coarsening threshold result in a merge of the respective triangles.
With encouragement by the company DHI are the aim of this B.Sc. thesis1 to investigate, whether if it is possible to accelerate the simulation speed of DHIs commercial product MIKE 21 HD, by formulating a parallel solution scheme and implementing it to be executed on a CUDA-enabled GPU (massive parallel hardware).
Although not as common as symmetric matrices, skew-symmetric matrices arise in practice in fields such as physics, biology and economy, as well as a first step in solving the skew-symmetric eigenvalue problem.
Due to the fast evolution of computer architectures, which tends towards manycore, software has to be constantly optimized or re-written in order to sustain performance.
Having started operational work in August 2012, the ESF young researcher group IMData seeks to develop new integrated mechanisms for accelerating data intensive workloads in heterogeneous manycore systems. This extended abstract and the accompanying poster summarizes the observations that motivate the project and the approach we are going to take.
We describe an efficient parallelization strategy for the discontinuous Galerkin spectral element method, illustrated by a structured grid framework. Target applications are large scale DNS and LES calculations on massively parallel systems. Due to the simple and efficient formulation of the method, a parallelization aiming at one-element-per-processor calculations is feasible; a highly desired feature for emerging multi- and many-core architectures. We show scale-up tests on up to 131,000 processors.
