The automation of software requirements analysis and test case generation remains one of the most pressing challenges in modern software engineering. Traditional approaches rely heavily on manual effort, which is time-consuming, error-prone, and inconsistent, especially as systems grow in complexity. This paper presents SmartSE, a novel AI-driven framework that leverages Large Language Models (LLMs), specifically fine-tuned variants of GPT-4 and LLaMA-3, to automate two critical phases of the software development lifecycle (SDLC): (1) natural language requirements analysis and formalization and (2) intelligent test case generation. The proposed framework integrates a multi-stage pipeline comprising requirement parsing, ambiguity detection, semantic enrichment, and test oracle synthesis. The authors evaluate SmartSE on three real-world open-source projects, Apache Kafka, Mozilla Firefox, and OpenMRS, spanning over 14,000 requirement statements and 21,000 existing test cases.
Many real-world applications rely on head pose estimation. The performance of head pose estimation has significantly improved with techniques like convolutional neural networks (CNN). However, CNN requires a large amount of data for training. This article presents a new framework for head pose estimation using computationally efficient first-order model-agnostic meta-learning (FO-MAML)-based method and compares the performance with existing MAML-based approaches. Experiments using one-shot, five-shot, and ten-shot settings are done using MAML and FO-MAML. A mean average error (MAEavg) of 7.72, 6.30, and 5.32 has been achieved in predicting head pose using MAML for one-, five-, and ten-shot settings, respectively. Similarly, MAEavg of 8.33, 6.84, and 6.23 has been achieved in predicting head pose using FO-MAML for one-, five-, and ten-shot settings, respectively. The computational complexity of an outer-loop update in MAML is found to be O(n2) whereas for FO-MAML it is O(n).
Embedded systems are increasingly used in our daily life due to their importance. They are computer platforms consisting of hardware and software. They run specific tasks to realize functional and non-functional requirements. Several specific quality attributes were identified as relevant to the embedded system domain. However, the existent general quality models do not address clearly these specific quality attributes. Hence, the proposition of quality models which address the relevant quality attributes of embedded systems needs more attention and investigation. The major goal of this paper is to propose a new quality model (called ESQuMo for embedded software quality model) which provides a better understanding of quality in the context of embedded software. In addition, it focuses the light on the relevant attributes of the embedded software and addresses clearly the importance of these attributes. In fact, ESQuMo is based on the well-established ISO/IEC 25010 standard quality model.
Embedded systems are increasingly used in our daily life due to their importance. They are computer platforms consisting of hardware and software. They run specific tasks to realize functional and non functional requirements. Several specific quality attributes were identified as relevant to the embedded system domain. However, the existent general quality models do not address clearly these specific quality attributes. Hence, the proposition of quality models which address the relevant quality attributes of embedded systems needs more attention and investigation. The major goal of this paper is to propose a new quality model (called ESQuMo for Embedded Software Quality Model) which provides a better understanding of quality in the context of embedded software. Besides, it focuses the light on the relevant attributes of the embedded software and addresses clearly the importance of these attributes. In fact, ESQuMo is based on the well-established ISO/IEC 25010 standard quality model.
A Cache plays a vital role in improving performance in the multicore environment, especially the Last Level Cache (LLC). The improvements in performance are based on the block size, associativity, and replacement policies. Most of the papers concentrate on traditional Least Recently Used (LRU) based replacement policies for their replacement decisions. Unfortunately, the replacement decisions do not enhance performance of the cache as expected. An enhanced modified Pseudo LRU policy is proposed, which is an approximation of LRU. The proposed methodology uses counters to enhance the confidence of replacement decisions based on the history of the replaceable blocks in cache. It is very clear from the Simulation results that the replacement scheme proposed exhibits better performance improvement in terms of miss ratio of about 3% and energy efficiency of about 2% on an average.
Digital transformation in Industry 4.0 today is associated with the transition to cyber-physical systems through the use of digital twin technologies, the industrial Internet, Big Data, Artificial Intelligence, Machine Learning, etc. In this work, an attempt of strict theory developing was made that would allow to determine, “what Digital Twin is” and to determine the place of the Digital Twin among other models. As a result, a cyber-physical Cross-Domain Model of Communication Service Provider and the model of the Digital Twin for the digital service provider was suggested. The models aim to meet new problems in communications management.
The article proposes a state forecasting method for telecommunications networks (TN) that is based on the analysis of behavioral models observed on users' network devices. The method applies user behavior that makes it possible to forecast with more accuracy both the network parameters and the load at various back-ends. Suggested forecasts facilitate implementing reasonable reconfiguration of the TN. The new method proposed as a further development of TN states the forecasting method presented by the authors before. In this new version, forecasting algorithm users' behavioral models are involved. The models refer to a class of time diagrams of device transitions between different states. The novelty of the proposed method is that resulting TN models enable forecasting device state transitions represented in a device state diagram in the form of knowledge graph, in particular changes in loads of different back-ends. The provided case study for a subgroup of network devices demonstrated how their states can be forecasted using behavioral models obtained from log files.
The Large Hadron Collider (LHC) demands a huge amount of computing resources to deal with petabytes of data generated from High Energy Physics (HEP) experiments and user logs, which report user activity within the supporting Worldwide LHC Computing Grid (WLCG). An outburst of data and information is expected due to the scheduled LHC upgrade, viz., the workload of the WLCG should increase by 10 times in the near future. Autonomous system maintenance by means of log mining and machine learning algorithms is of utmost importance to keep the computing grid functional. The aim is to detect software faults, bugs, threats, and infrastructural problems. This paper describes a general-purpose solution to anomaly detection in computer grids using unstructured, textual, and unsupervised data. The solution consists in recognizing periods of anomalous activity based on content and information extracted from user log events. This study has particularly compared One-class SVM, Isolation Forest (IF), and Local Outlier Factor (LOF). IF provides the best fault detection accuracy, 69.5%.
Improving smart environment communication remains a final unachievable destination. Continuous optimization in smart environment communication is mandatory because of an emerging number of connected devices. Carefully observing its parameters and demands leads to acknowledging existing challenges and boundaries regarding areas covered with signal and possibilities of approaching network architecture, limited battery resources in certain nodes of network architecture, privacy, and security of existing data transfer. One approach to dealing with these communication challenges and boundaries is focusing on important technical parameters respectively, signal processing speed, communication nodes distance, and communication channel security. The aim of this article is to point out these most important communication parameters in smart environments and how changing those can affect communication. Its original contribution is represented in establishing principles for governing security parameters by using permanent magnets in order to produce Faraday's rotation and thus manipulate the whole process of communication in a smart environment.
The article aims to develop a model for forecasting the characteristics of traffic flows in real-time based on the classification of applications using machine learning methods to ensure the quality of service. It is shown that the model can forecast the mean rate and frequency of packet arrival for the entire flow of each class separately. The prediction is based on information about the previous flows of this class and the first 15 packets of the active flow. Thus, the Random Forest Regression method reduces the prediction error by approximately 1.5 times compared to the standard mean estimate for transmitted packets issued at the switch interface.
Transmission of sensitive data in space missions and particularly in satellite remote sensing to the ground station is exposed to multiple threats impacting the confidentiality of data, access unauthorized to the satellite system, in addition, the space environment causes several threats that can affect the hardware of satellites. This paper describes an improved approach to implement a secure Land Surface Temperature-Split Windows (LST-SW) algorithm based on the Advanced Encryption Standard using the Reconfigurable Dynamic Method for application on-board earth observation satellites implemented on radiation-tolerant Virtex-4QV FPGA. The experimental results showed that the proposed hardware secure implementation of the LST-SW algorithm using Xilinx Virtex-4QV FPGA achieves higher throughput of 907.644 Mbps sufficient for satellite remote sensing mission. Moreover, the suggested implementation consumes 4089 Slices and 4 BRAMs. Finally, the authors use security measurement analyses to verify the safety and performance of the proposed encryption LST-SW module.
Data mining is applied in various domains for extracting knowledge from domain data. The efficiency of DM algorithms usage in practice depends on the context including data characteristics, task requirements, and available resources. Semantic meta mining is the technique of building DM workflows through algorithm/model selection using a description framework that clarifies the complex relationships between tasks, data, and algorithms at different stages in the DM process. In this article, an architecture of semantic meta mining assistant for domain-oriented data processing is proposed. A case study applied proposed architecture on time series classification tasks is discussed.
Dynamic resource allocation of cloud data centers is implemented with the use of virtual machine migration. Selected virtual machines (VM) should be migrated on appropriate destination servers. This is a critical step and should be performed according to several criteria. It is proposed to use the criteria of minimum resource wastage and service level agreement violation. The optimization problem of the VM placement according to two criteria is formulated, which is equivalent to the well-known main assignment problem in terms of the structure, necessary conditions, and the nature of variables. It is suggested to use the Hungarian method or to reduce the problem to a closed transport problem. This allows the exact solution to be obtained in real time. Simulation has shown that the proposed approach outperforms widely used bin-packing heuristics in both criteria.
Encryption is an essential process in electronic data transmission because it securely protects the data from unauthorized access. In this digital era, information and its security are of great concern with technology advancements. As we have entered into 5G technology that targets end-to-end security and speed to communicate with intelligent devices. These devices and systems need an AES module having both the operation as encryption and decryption in a single module to communicate in duplex mode to access the information in a real-time environment. This article has architecture of a unified module with modified round operation and has been implemented on Virtex-7 FPGA platform. Mix column adds vertical alteration in the algorithm and this design has managed the utilization of Mix column block to make an optimized AES algorithm. The unified AES has achieved a maximum frequency of 290.3MHz and resource utilization of 9416 slice LUTs design, including some modification in traditional AES, resulting in less resource utilization and high throughput.
This paper discusses the problem of tracking of deadlock-free routes. A brief overview of existing software tools providing this functionality is given. A complete overview of the proposed software for building routes for given SpaceWire onboard networks is presented. The paper discusses the application of different existing methods for the choosing of the best route from the list of the deadlock-free routes. A brief overview of the methods for of choosing the best route according to the provided criteria is given. A new method for choosing of the best route and its modification is proposed. Authors provide the result of the methods application and the detailed comparison.
Embedded systems are proceeding towards exploiting virtualization technology to have the benefits of Real-Time Operating System (RTOS) and General-Purpose Operating System (GPOS) in the same system. This combination provides both a timely and deterministic behavior and a general-purpose application codebase. There still exist concerns about the real-time responsiveness of RTOS running inside a Virtual Machine (VM). In this paper, the real-time performance of Kernel-based Virtual Machine (KVM) virtualization architecture is analyzed on a multi-core system. Here, a preemptible Linux kernel with the PREEMPT_RT patch is used for RTOS, while a standard Linux kernel is used for GPOS. The interrupt latency inside the real-time guest VM is analyzed by applying various amounts of CPU, memory, and I/O stresses on the guest and host systems. A VM resource monitoring tool ‘VM_stat’ is developed to know the resource usage of the guest VMs, which is useful for effectively tuning the system. Different real-time tuning measures are applied on the host/guest systems and the performance is analyzed.
Because of SRAM sensitivity to radiation, SRAM-based FPGA systems deployed in harsh environments require error mitigation methods to reduce their overall downtime. This paper presents a fault-tolerant reconfigurable imaging system that relies on the DPR feature for correcting errors in the configuration memory and loading camera system IPs. The system reliability is evaluated by injecting faults in the FPGA configuration memory at runtime using the Xilinx SEM IP. The faults are injected internally using the Internal Configuration Access Port (ICAP), which is shared between the fault injection core and system parts. The results showed that 95% of the errors can by corrected automatically. This paper also proposes a fast-Built-in-Self-Test (BIST) mitigation technique to reduce the overall downtime in case of errors. This technique can reduce the recovery time by 80%. Moreover, Triple Modular Redundancy (TMR) is used to increase the overall reliability without significantly increasing the resource overhead.
The article is devoted to the development of the methodology for the controlled synthesis of protective coatings by the micro-arc oxidation method in order to improve the efficiency of this technology and the quality of the obtained oxide layers. Methodology includes a mathematical model of a galvanic cell based on an equivalent electrical circuit, as well as a model of the interconnections between the technological parameters of the micro-arc oxidation (MAO) process and the properties of the obtained oxide layers based on graph theory. The indicated dependences are formalized using methods of regression and correlation analysis of experimental data. A technique for the controlled synthesis of MAO coatings using the obtained regression equations is proposed. The structure and functioning algorithm of an intelligent automated system for the controlled synthesis of MAO coatings are developed. A prototype of this system was used to obtain experimental dependences of reaction parameters on the influence parameters of the micro-arc oxidation process.
Real-time requirements are actual for most aerospace systems. Time synchronization in all network devices needs for implementation of real-time mechanisms. The SpaceFibre standard is developed for aerospace networks. But current version of this standard does not include any time synchronization mechanism. In this paper, we consider time synchronization mechanisms supported in standards currently used for aerospace systems and propose several mechanisms for time synchronization in SpaceFibre networks. We evaluate achievable synchronization accuracy for proposed mechanisms. For some of them achievable synchronization accuracy is better than that for considered standards. We propose implementation of proposed mechanisms based on dynamically reconfigurable local time controller unit. This implementation made it possible to explore the achievable characteristics of all proposed mechanisms. It is planned to use it in further research due to the possibility of reconfiguration. In the paper we show that in different networks, it may be advisable to use different synchronization mechanisms depending on user requirements. Our implementation with the dynamic reconfiguration provides the possibility of using various mechanisms, including when implemented with ASIC technology.
