It will not be long before today's high-end processors move from just two or three execution engines to many hundreds. And we still don't know how to get software to tame these beasts.
Analogue design-tool companies are keen to define a standard for constraints. But it has a long way to go.
Integrated device manufacturers will lead the uptake of three-dimensional (3D) integrated circuit (ICs) technology, according to speakers on a panel held during an annual review meeting at Belgium's IMEC nanoelectronics research centre. The move to 3D integration is partly a response to the rising costs of implementing system-on-chip (SoC) devices processess.
Psychologists are warning of potential problems for drivers if the in-car technology they use is too intrusive
The decision by PC processor makers to forge connections to FPGA accelerators has opened up a market for embedded-compute engines styled as appliance, and programmable logic may end up being a core part of the PC itself. It's rarely a good idea to bet against programmability. The trend has always been towards more flexible, reusable, programmable systems. That means that, over time, processors generally win out. But problems with power consumption, particularly on multi-gigahertz, PC-class processors, means that there is no longer an easy option for performance improvements in software. It has to be split up and run on parallel elements.
The makers of 32bit microcontrollers are looking to steal business away from the 8 and 16bit markets, using more advanced processes to compete on price. But the 8bit makers are trying to fight back by giving their slower cores a helping hand. Prices on 32bit microcontrollers have dropped dramatically over the past few years as vendors try to encourage designers to migrate to their cores from 8 and 16bit architectures that have run out of steam, either in terms of memory or performance. But the 8bit architectures are fighting back, adding specialised coprocessors and accelerators so they can slug it out with higher-spec parts.
The universal serial bus (USB) is a phenomenally successful connection standard. Although its arrival on PCs was not accompanied by working drivers, once the key operating systems had been updated, it rapidly replaced clunky D-type serial connectors and unwieldy parallel printer cables, and has now spread to almost everything you can connect to a computer, from digital cameras to novelty office rocket launchers. USB will add wireless and higher speed variants if standards makers can overcome some tricky issues.
The rapid growth in NAND flash capacity has made it possible to store hundreds of thousands of images from high-end digital still cameras. But the most recent increases in claimed capacity are coming at the expense of increased die size. The Samsung 64 Gb NAND flash memory was built using a technique called self-aligned double-patterning in an attempt to overcome problems with defining on-chip features as small as 30 nm across using light with a wavelength more than six times longer than that. Double patterning works by using two complementary masks exposed one at a time to ease the demands on lithography. In effect, two patterns spaced at 60 nm are overlapped to produce the 30 nm features. Double-patterning slows down the lithography process and restricts what can be printed, making it unpopular among logic users. But it may be viable for bulk memory production as those designs are far more regular.
Digital and analogue circuits have never been that happy together. The noise pollution from logic circuits hammering away is only going to get worse.
How an oscilloscope captures and displays signals can make a big difference to your ability to track down glitches.
We are now - if the vendors involved are to be believed - living in the age of ZigBee. Like Bluetooth, it mainly operates in the licence-exempt industrial, scientific and medical (ISM) band around 2.4GHz. Unlike Bluetooth, which is predominantly used for wireless headsets, it is intended for short range data communications between `intelligent' devices. This puts in firmly in the industrial and commercial sector, as opposed to Bluetooth which now sits almost exclusively in the consumer space. The focus on industrial and not consumer applications means ZigBee faces a difficult challenge; it needs to offer the performance demanded by industrial and commercial applications, but with a competitively low price tag when compared to existing proprietary implementations - both wired and wireless - in a highly fragmented marketplace.
Linkers in embedded-software toolchains are getting smarter, making it possible to alter code rapidly and avoid long recompilations.
Careful thought is needed to design portable systems that have a strong mixed-signal component. The need to power a system purely from batteries puts severe constraints on the design in terms of energy consumption. We are seeing more portable systems appear, particularly in the medical, industrial and consumer markets. Cost and size considerations mean they often need custom silicon designing for them. But there are different trade-offs needed depending on where the bulk of the energy is consumed. For energy efficient designs, it is important to calculate the energy budget of a system including internal and external power dissipation, and also to consider the energy budget summed over the full operating cycle or lifetime.
Until recently, CMOS and RF looked as though they would follow separate paths when it came to chip design. Chris Edwards looks at how teams are now looking seriously at combining them on the latest wave of digital silicon processes.
The rise of multicore embedded processors is seeing many standards groups trying to work out how to get debuggers to work together.
MEMS design means being able to tie the electrical world to the mechanical. One of the big problems with MEMS lies in design - finding the right people to do it and creating the tools and flows to make it, if not easy, then at least tractable. Another major issue for MEMS is encapsulation - packaging a part well enough that its moving or sensing elements do not get contaminated with water vapour or organic matter. This issue has been the rock on which a number of MEMS start-ups, particularly in the timing market, have already foundered.
After years in the wilderness, high-level synthesis is moving into chip design with the promise of time savings. In hardware design, most teams today have to describe in fine detail how a logic block will operate. Design using a hardware description language (HDL) is more efficient than the laborious schematic-capture techniques used during the 1980s, but the synthesis tool that uses the HDL as input still has to be told the precise architecture of each block. The designer has to decide whether a multiplier uses carry-save adders and advanced techniques such as Booth recoding or more space- efficient but slower structures. However, the structures that go inside a multiplier are well understood and, in principle, a machine could decide which of a candidate set of multipliers is the right choice. That is the promise of behavioural synthesis - a tool that makes it possible for high-level descriptions of an architecture to generate working logic. Although tools have been around for more than ten years, chip designers are just beginning to take them seriously.
Energy scavengers promise a way of getting away from battery power but there are many difficult design issues to deal with.
Designers of sub-100nm chips who are worried about power consumption look almost certain to be forced to make a choice between two standards as a merger between them looks less likely than ever. Yet, behind the scenes, both standards are acquiring features from each other.
