This work aims to study the effect of unwanted peaks and enhance the performance of wireless systems on the basis of tackling such peaks. A new proposition has been made based on wavelet transform method and its entropy. Signals with large peak-to-average power ratio (PAPR) will be examined such as the ones that is considered as the major Orthogonal Frequency Division Multiplexing (OFDM) system's drawbacks. Furthermore, a spatial diversity Multiple-Input Multiple-Output (MIMO) technology is used to overcome the complexity addition that could arise in our proposition. To draw the best performance of this work, a MATLAB simulation has been used; it is divided into three main stages, namely, MIMO-OFDM symbol's reconstruction based on wavelet transform, a predetermined thresholding formula, and finally, moving filter. This algorithm is called Peaks' detection based Entropy Wavelet Transform; PD-EWT. Based on the simulation, and under some constrains such as the bandwidth occupancy and the complexity structure of the transceivers, a peak detection ratio has been achieved and reaches around 85 %. Comparing with our previously published works, the PD-EWT enhances the detection ratio for 25% more peaks.
Hash functions play an important role in modern cryptography. They are widely used to provide services of data integrity and authentication. Hash algorithms are based on performing a number of complex operations on the input data that require a significant amount of computing resources especially when the input data are huge. Thus, hardware implementation is far more suitable, for security and performances execution issues, compared to the corresponding software implementations. Hash functions perform internal operations in an iterative fashion, which open the possibility of exploring several implementation strategies. In this paper, we are concerned by optimizing the hardware implementation of the SHA-256 algorithm on Virtex-5 of Xilinx FPGA. Our main contribution is to design a compact SHA-256 core and to speed-up its critical paths which are respectively seven and six words addition. The CS (Carry Save) representation is advantageously used to overcome the carry propagation, until the last addition. Special efforts were made to design, at the LUT level, the two components (compressors 7:2 and 6:2) which are the key features of our design; their delay is data path independent and equivalent to the delay of two LUT6. The resulting architecture is compact and operates at 170 MHz with a throughput of 1.36 Gbps.
Personal recognition based on retina has been an attractive topic of scientific research. A common challenge of retinal identification system is to ensure a high recognition rate while maintaining a low mismatching FMR rate and execution time. In this context, this paper presents a retinal identification system based on a novel local feature description. The proposed system is composed of three stages, firstly we enhance the retinal image and we select a ring around the optical disc as an interest region by using our recently proposed Optical Disc Ring ODR method. Secondly, in order to reduce the mismatching rate and speed up the matching step, we propose in this paper an original alternative local description based on the Remove of Uninformative SIFT Keypoints, that we call SIFT-RUK. Finally, the generalization of Lowe's matching technique (g2NN test) is employed. Experiments on the VARIA database are done to evaluate the performance of our proposed SIFT-RUK feature-based identification system. We show that we obtain a high performance with 99.74% of identification accuracy rate without any mismatching (0% of False Matching Rate FMR) and with a low matching processing time compared to existing identification systems.
Three-dimensional Networks on chip 3D-NoCs represent a new generation of communication structure that enhances the performance and overcomes the limitations of two-dimensional NoCs. They offer, by replacing long interconnects by much shorter high-speed vertical links called Through-Silicon-Vias TSVs, fast and power efficient inter-core communication. However, vertical TSVs links bring several problems due to its large area footprint and increased manufacturing cost. In this context, we propose a new 3D-mesh NoC architecture based on shared TSVs and serialized data. This architecture is constructed using 2D and 3D routers. In this paper, we describe the design and implementation of the 2D router that ensures the intra-layer communication. It is characterized by its simple virtual channel allocation scheme that allows enhancing its area and power consumption characteristics.
In general, image compression is the best way to decrease the communication bandwidth and save the transmission power. However, due to power and size limitation, traditional image compression techniques are not appropriate, therefore, more special techniques are required. So, the image compressor should be able to sufficiently compress the captured images to save the transmission power, retain reconstruction quality for an accurate diagnosis and should also take a small physical area. To meet all these conditions, we proposed an efficient hardware architecture of Cordic based Loeffler DCT compression algorithm designed for wireless endoscopic capsule. Our improvement over the original algorithm concerns the cordic part. This allowed us to reduce the number of addition from 38 to 30 add operations in the main algorithm whereas the shift operations number remain constant (16 shift operations). Moreover, to further ameliorate our results, we used Modified Carry Look Ahead adder (MCLA) and Carry Save Adder (CSA) which are characterized by low power and high speed compared to classical Carry Look Ahead Adder (CLA). Our aim is to provide an optimized architecture in terms of area and power consumption all in accordance with the image quality. The proposed design was implemented on (Field Programmable Gate Arrays) FPGA. Compared to other architectures; the proposed architecture has not only reduced the computation complexity, but also the area and power consumption. It should be noted that the proposed DCT architecture is very suitable for low power and high-quality codecs, that granted the image quality and this is proved by a software implementation using Matlab, especially for battery-based systems.
