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    IET Power Electronics

    IET Power Electronics

    JournalISSN 1755-4535eISSN 1755-4543中科院 工程技术 4区

    年发文量

    研究主题

    论文(4181)

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    1A Voltage‐Lifting‐Based Ultra‐High Gain DC‐DC Converter with Super‐Twisting Sliding Mode Control for Electric Vehicle Applications
    Madhav Kumar,Kaibalya Prasad Panda,Ritula Thakur, Jibitesh Kumar Panda,Gayadhar Panda

    ABSTRACT Ultra‐high‐gain DC–DC converters are increasingly required to meet the high‐voltage conversion needs of modern electric vehicle powertrains. This work proposes a high step‐up DC–DC converter intended for fuel‐cell‐fed EV applications. The converter combines a quadratic boosting cell with voltage‐lift action to obtain a large conversion ratio. Using two switches, two inductors, six diodes, and the required capacitor network, the topology provides nearly 18‐time voltage gain at a 0.5 duty ratio. Furthermore, a theoretical examination of converter functionality in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM) is furnished. The topology offers high efficiency, large voltage boosting capability, and lower semiconductor voltage stress. The proposed layout outperforms competing high step‐up converters in terms of efficiency, voltage gain, and voltage stress at the component level. To ensure robust and reliable operation, a super‐twisting sliding mode control (ST‐SMC) technique is employed, providing fast dynamic response, reduced chattering, and strong disturbance rejection under varying operating conditions. A 250 W laboratory prototype is created and experimentally tested under both open‐loop and closed‐loop working situations to validate the suggested converter architecture. Comprehensive theoretical analysis and experimental investigations are carried out to evaluate the efficiency and overall performance of the converter. The measured results closely follow the analytical predictions, confirming high efficiency and stable operation. Consequently, the proposed converter is well suited for FCEV applications due to its superior efficiency and robust control performance. Supports SDG 7 and SDG 13 through efficient, clean fuel‐cell transportation.

    2026
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    2High‐Misalignment‐Tolerance Three‐Phase Underwater Capacitive Wireless Power Transfer System for Cylindrical Underwater Vehicles
    Lei Yang, Chenyu Liu, Shihao Guo, Xin Dai, Xuena Chen, Siyang Zhang, Yunjie Sun

    ABSTRACT This paper proposes a three‐phase underwater capacitive wireless power transfer (UCWPT) system employing a cylindrical six‐plate coupler for cylindrical underwater vehicles with enhanced tolerance to rotational misalignment. Electric‐field simulations in air and freshwater indicate that the field is strong in air and markedly attenuated in water, while its spatial distribution remains stable under rotational offsets. A bilateral three‐phase LCLC compensation network, a high‐frequency inverter, and a three‐phase rectifier are designed. Starting from the complete six‐plate capacitance model, an equivalent single‐phase π model is derived, and fundamental harmonic analysis is used to obtain the resonance conditions, output power, and efficiency. PLECS simulations and experiments in air and freshwater (500 µS/cm) validate the proposed system. In air (20 mm gap), the prototype delivers 1 kW at 87.4% efficiency and reaches a peak efficiency of 88.7%; in freshwater with a conductivity of 500 µS/cm (20 mm transfer distance), it delivers 113 W at 53.1% efficiency, which is suitable for charging small inspection autonomous underwater vehicles and underwater sensor nodes. In both media, stable operation is maintained for rotational misalignment angles up to 25°. The results demonstrate that the proposed system provides robust rotational‐misalignment tolerance and stable power transfer for cylindrical underwater vehicles.

    2026
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    3Power Loss Analysis and Performance Study of MMC‐based HVDC System Using 10 Kv SiC Device
    Shuyi Xi, Haibo Tang, Yuxi Liang, Qian Yin,Zheng Zeng,Hao Feng,Jianyu Pan

    ABSTRACT The emergence of 10 kV silicon carbide (SiC) devices presents a viable approach to drastically reduce the SM count, facilitating more compact and efficient MMC designs. Nevertheless, the power loss and overall system performance are unknown when using 10 kV SiC devices. This paper systematically investigates the power loss and overall performance of MMCs with 10 kV SiC devices compared with traditional 3.3 kV silicon (Si) submodules (SMs). First, it studies the switching performance of 10 kV SiC devices by testing to obtain device‐specific loss parameters. Then, the accurate power loss analysis method of the SM and MMC systems is presented. A comparative study is made between the 10 kV SiC device and the 3.3 kV Si device for the MMC‐based high voltage direct current (HVDC) system, including losses, efficiency, harmonics, and capacitor voltage fluctuations. Results indicate that 10 kV SiC devices significantly reduce the switching power loss by over 60%. The conduction loss is reduced by 65.6% at light load while this loss is similar with Si device at the heavy load. The overall performance of the MMC system is also improved in terms of circulating current and capacitor voltage ripple.

    2026
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    4AC‐Side Impedance Modelling and High‐Frequency Oscillation Analysis of MMC‐HVDC Incorporating DC Voltage Measurement Dynamics
    Shuguang Song, Xingyu Liu, Qingxiao Du, Wenzhong Ma

    ABSTRACT This paper extends the impedance model of a modular multilevel converter (MMC) by incorporating the dynamics of DC voltage measurement. The structure and input‐to‐output voltage transfer function of the DC voltage measurement device are first analysed, revealing its non‐ideal dynamic behaviour in the medium‐ and high‐frequency ranges. Based on this, the harmonic state‐space (HSS) model is reformulated to integrate the measurement dynamics into the impedance modelling framework. The impact of the DC voltage measurement dynamics on the AC‐side impedance characteristics and high‐frequency stability of the MMC system is then analysed. It is shown that the non‐ideal measurement dynamics can introduce additional phase lag and gain variation, which may give rise to AC‐side high‐frequency oscillations (HFOs) and consequently deteriorate system stability. Furthermore, the effect of DC voltage controller parameters on the developed impedance is analysed. It is observed that reducing the proportional gain can suppress HFOs, but this also results in degraded transient performance. Based on the above findings, an LPF is incorporated into the DC voltage loop as a practical mitigation measure to suppress the identified oscillations. The theoretical analysis is verified through MATLAB/Simulink simulations.

    2026
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    5Layout‐Dominated Dynamic Current Sharing Analysis and Optimisation for Multi‐Chip SiC Power Modules Considering Mutual Inductances
    Xiaofeng Yang, Li Zhang, Hao Li,Xuebao Li, Changyue Ren,Rui Jin,Zhibin Zhao,Peng Zhang

    ABSTRACT Significant mutual inductance coupling between the paralleled branches in multi‑chip SiC power module critically affects dynamic current sharing among paralleled chips. Existing studies neither fully account for mutual inductance coupling nor distinguish the impact of individual mutual inductance components on dynamic current sharing. These limitations hinder targeted guidance for package layout optimisation. This paper presents a systematic analysis of the dynamic current sharing mechanism by accounting for all mutual inductances. Four inductance difference coefficients (IDCs) are defined to quantify the effects of individual mutual inductance components and a comprehensive IDC is proposed as a unified metric for evaluating current sharing performance. Simulation and experimental results demonstrate that the comprehensive IDC exhibits a strong positive correlation with dynamic current imbalance degree, with a Pearson correlation coefficient exceeding 0.97, thereby validating the proposed mechanism. Based on the analytical expressions and physical interpretations of the four IDCs, systematic optimisation strategies for improving dynamic current sharing are developed. After optimisation, the dynamic current imbalance degree is reduced by 56.27% in simulation and 22.70% in experiment. The experimental and simulated trends across different package layouts are consistent, verifying the effectiveness of the optimisation strategies.

    2026
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    高被引作者

    作者引用发文
    Ebrahim Babaei326679
    Mehran Sabahi191749
    Seyed Hossein Hosseini169848
    Bhim Singh165872
    Ehsan Adib137553
    Frede Blaabjerg128547
    Saad Mekhilef104625
    Barry Williams100324
    Marian K. Kazimierczuk90020
    Xiangning He83522

    高产作者

    作者引用发文
    Ebrahim Babaei326679
    Bhim Singh165872
    Ehsan Adib137553
    Bor-Ren Lin80453
    Mehran Sabahi191749
    Seyed Hossein Hosseini169848
    Frede Blaabjerg128547
    Atif Iqbal69733
    Saad Mekhilef104625
    Barry Williams100324

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