
In this work, the large AMOLED Display Backplane LTPS 5Mask PA method was studied. A storage cap was formed by doping boron on the poly Si under the GI cap in the contact hole process without using a storage cap doping mask. In the contact hole process, half-tone PR was used to simultaneously perform cap doping and TFT Source drain open. Since half-tone PR must remain uniform to protect the cap lead-in end with GI uniformly within 8G Glass, photolithography PR process conditions with good half-tone uniformity were set up.
This work presents a novel pixel circuit that can be applied to low refresh rate AMOLED displays, such as smartwatch displays, using LTPS TFTs. The circuit employs a leakage current balance method (LCBM) to address the issue of leakage currentunder low refresh rate conditions, enabling the pixel circuit to maintain uniform current even during a prolonged emission period. Furthermore, the anode of OLED is reset to prevent undesired emissions during programming stages, thus avoiding flicker. Simulation results of HSPICE simulator demonstrate that at a refresh rate of 15 Hz, the current fluctuations for high, medium, and low gray levels after 66.67 ms of emission time are 0.91%, 2.10%, and 9.29%, respectively.
P-channel solution-processed hybrid field effect transistors based on a blend of conjugated polythiophene and perovskite nanocrystals show a carrier mobility enhancement of more than 166% with respect to that of pristine polythiophene devices. The performed devices under illumination show significant photoresponse and external quantum efficiency. This work may further our understanding on the interaction between polythiophene and perovskite nanostructures
A technique to obtain high carrier mobility of Sn-doped Ge thin-films (thickness: $\le 20$ nm) on insulators is proposed. In a conventional approach, the grain sizes of Sn-doped poly-Ge films grown by solid-phase crystallization decrease with decreasing thickness. This significantly deteriorates the carrier mobility. To solve this problem, thinning of thick Ge films having large grain sizes is investigated. Moreover, to eliminate the crystal defects, post-annealing is examined. This achieves high carrier mobility $(\sim 200$ cm$^{2} /$Vs) even for thin-films (thickness: 20 nm). A good transistor operation is demonstrated using the thinned Ge films. This technique will be useful to realize advanced thin-film transistors for next-generation electronics.
In this study, we show a reason why high-mobility oxide TFTs tends to exhibit poor reliability such as NBTS and PBTS. It is revealed that the NBTS mechanism is mainly attributed to the Fermi level shift of a-ITZO itself and it is highly dependent on the conduction band minimum location. Based on this background, we found that the charge transfer between ITZO active layer and CO-related impurities is responsible for NBTS instability. Consequently, we successfully developed a highly stable ITZO TFT with the mobility of 70 cm2/Vs by eliminating the CO-related impurities and the introduction of passivation layer.