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    Journal of Computer Research and Development

    Journal of Computer Research and Development

    JournalISSN 1000-1239

    年发文量

    研究主题

    论文(8603)

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    1Reinforcement Learning-based Feature Generation Algorithm for Scientific Data

    Feature generation(FG)aims to enhance the prediction potential of original data by constructing high-order feature combinations and removing redundant features.It is a key preprocessing step for tabular scientific data to improve downstream machine-learning model performance.Traditional methods face the following two challenges when dealing with the feature generation of scientific data:First,the effective construction of high-order feature combinations in scientific data necessitates profound and extensive domain-specific expertise.Secondly,as the order of feature combinations increases,the search space expands exponentially,imposing prohibitive human labor consumption.Advancements in the data-centric artificial intelligence(DCAI)paradigm have opened novel avenues for automating feature generation processes.Inspired by that,this paper revisits the conventional feature generation workflow and proposes the multi-agent feature generation(MAFG)framework.Specifically,in the iterative exploration stage,multi-agents will construct mathematical transformation equations collaboratively,synthesize and identify feature combinations exhibiting high information content,and leverage a reinforcement learning mechanism to evolve their strategies.Upon completing the exploration phase,MAFG integrates the large language models(LLMs)to interpretatively evaluate the generated features of each significant model performance breakthrough.Experimental results and case studies consistently demonstrate that MAFG framework effectively automates the feature generation process and significantly enhances various downstream scientific data mining tasks.

    2025
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    2A Plan Reuse Mechanism for LLM-Driven Agent

    Integrating large language models (LLMs) into personal assistants, like Xiao Ai and Blue Heart V, effectively enhances their ability to interact with humans, solve complex tasks, and manage IoT devices. Such assistants are also termed LLM-driven agents. Upon receiving user requests, the LLM-driven agent generates plans using an LLM, executes these plans through various tools, and then returns the response to the user. During this process, the latency for generating a plan with an LLM can reach tens of seconds, significantly degrading user experience. Real-world dataset analysis shows that about 30% of the requests received by LLM-driven agents are identical or similar, which allows the reuse of previously generated plans to reduce latency. However, it is difficult to accurately define the similarity between the request texts received by the LLM-driven agent through directly evaluating the original request texts. Moreover, the diverse expressions of natural language and the unstructured format of plan texts make implementing plan reuse challenging. To address these issues, we present and implement a plan reuse mechanism for LLM-driven agents called AgentReuse. AgentReuse leverages the similarities and differences among requests’ semantics and uses intent classification to evaluate the similarities between requests and enable the reuse of plans. Experimental results based on a real-world dataset demonstrate that AgentReuse achieves a 93% effective plan reuse rate, an F1 score of 0.9718, and an accuracy of 0.9459 in evaluating request similarities, reducing latency by 93.12% compared with baselines without using the reuse mechanism.

    2024引用:1
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    3Neural Rendering and Its Hardware Acceleration: A Review
    Xinkai Yan, Jieting Xu,Yuchi Huo,Hujun Bao

    Neural rendering is a new image and video generation method based on deep learning. It combines the deep learning model with the physical knowledge of computer graphics, to obtain a controllable and realistic scene model, and realize the control of scene attributes such as lighting, camera parameters, posture and so on. On the one hand, neural rendering can not only make full use of the advantages of deep learning to accelerate the traditional forward rendering process, but also provide new solutions for specific tasks such as inverse rendering and 3D reconstruction. On the other hand, the design of innovative hardware structures that adapt to the neural rendering pipeline breaks through the parallel computing and power consumption bottleneck of existing graphics processors, which is expected to provide important support for future key areas such as virtual and augmented reality, film and television creation and digital entertainment, artificial intelligence and the metaverse. In this paper, we review the technical connotation, main challenges, and research progress of neural rendering. On this basis, we analyze the common requirements of neural rendering pipeline for hardware acceleration and the characteristics of the current hardware acceleration architecture, and then discuss the design challenges of neural rendering processor architecture. Finally, the future development trend of neural rendering processor architecture is prospected.

    2024引用:2
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    4Cross-Layer Optimization for Fault-Tolerant Deep Learning
    ,,,,,

    Fault-tolerant deep learning accelerator is the basis for highly reliable deep learning processing and critical to deploy deep learning in safety-critical applications such as avionics and robotics. Since deep learning is known to be computing- and memory-intensive, traditional fault-tolerant approaches based on redundant computing will incur substantial overhead including power consumption and chip area. To this end, we propose to characterize deep learning vulnerability difference across both neurons and bits of each neuron, and leverage the vulnerability difference to enable selective protection of the deep learning processing components from the perspective of architecture layer and circuit layer respectively. At the same time, we observe the correlation between model quantization and bit protection overhead of the underlying processing elements of deep learning accelerators, and propose to reduce the bit protection overhead by adding additional quantization constrain without compromising the model accuracy. Finally, we employ Bayesian optimization strategy to co-optimize the correlated cross-layer design parameters at algorithm layer, architecture layer, and circuit layer to minimize the hardware resource consumption while fulfilling multiple user constraints including reliability, accuracy, and performance of the deep learning processing at the same time.

    2024
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    5A Dataflow Computing System for New Generation of Domestic Heterogeneous Many-Core Processors
    Xiao Qian, Zhao Meijia,Li Mingfan, Shen Li,Chen Junshi, Zhou Wenhao, Wang Fei,An Hong

    Today, scientific research has moved from computational science to the era of data science. Discovering laws from massive data and breaking through bottlenecks in scientific development are the main goals of the data science paradigm. At the same time, high-performance computers (HPC) are also paying more and more attention to intelligent computing power. Integrating AI algorithms on the basis of traditional high performance computing methods (HPC+AI) is more conducive to solving practical science problems in the ear of data science, and can give full play to the intelligent computing power of high-performance computers. However, on domestic HPC systems, especially on HPC systems constructed by the new generation of domestic heterogeneous many-core processors, there are many challenges to support HPC+AI programs. In this paper, we propose a data flow computing system for domestic heterogeneous many-core processors, which is called swFLOWpro. The system supports the use of TensorFlow interface to build data flow programs, realizes many-core parallel acceleration transparent to users, and implements two-level parallel strategy based on the whole processor perspective. Tested on sw26010pro processor, swFLOWpro can get up to 545X single core group(CG) many-core speedup ratio for typical OP, 346X for typical deep learning models. Compared with the single CG of sw26010pro, we execute ResNet50 model on all the 6 CGs for one whole processor, and the speedup ration is up to 4.96X, whose parallel efficiency is 82.6%. Experiments show that swFLOWpro can support the efficient execution of data flow programs represented by deep learning on domestic heterogeneous many-core processors.

    2023
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    高被引作者

    作者引用发文
    Xiaofeng Meng193751
    Jianzhong Li105354
    Xiang Ci8911
    Zhiguang Qin8108
    Qiao Liu79510
    Hong Gao78328
    Yao Liu7695
    Jie Cao7201
    Renfa Li69160
    Weisong Shi6533

    高产作者

    作者引用发文
    Renfa Li69160
    Jianzhong Li105354
    Xiaofeng Meng193751
    Ge Yu18145
    Bole Shi28644
    Houkuan Huang47444
    Yan Jia34542
    Zhongzhi Shi45542
    Dayou Liu49840
    Guoren Wang11438

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