A Compilation Framework for Domain Specific Multi-Chiplet Systems with Double-Layer Genetic Algorithms

As deep learning scales, single-die inference is bounded by reticle limits, motivating heterogeneous multi-chiplet systems with AI domain-specific accelerators (DSAs). However, inter-chiplet communication degrades performance–energy efficiency and complicates deployment. To address this issue, a compilation framework is introduced to automatically optimize deployment on such systems. Unlike prior work, both activation and weight traffic are modeled, including repeated weight transfers under limited on-chip memory. The deployment is cast as combinatorial optimization with throughput- or energy- prioritized objectives. A double-layer genetic algorithm is employed to decouple task segmentation from chiplet mapping, shrinking the search space and accelerating convergence while retaining global optimality considerations. A fast event-driven evaluator is integrated to estimate throughput and energy. Given a model and hardware description, deployment strategies are produced automatically. On an 8-chiplet system, up to 30.83% higher throughput and 24.65% lower energy were achieved; on average, throughput improved by 12.26% and energy decreased by 10.87% relative to state of the art work.