A Fully-Parallel and Flexible Baseband Processor Using Processing-in-Memory for Wireless Systems

This paper presents a novel architecture for realizing a fully parallel and flexible digital baseband processor for massive MIMO systems using processing-in-memory (PIM). The proposed approach leverages memristor-based crossbar arrays to implement key functional blocks within the baseband processing chain, thereby alleviating the data-movement bottleneck inherent in conventional von Neumann architectures. To enable efficient hardware mapping, the signal processing algorithms and corresponding computations are reformulated into a unified matrixbased framework. The resulting matrix operations are then mapped onto multiple crossbar arrays, exploiting their intrinsic analog computing capabilities. The proposed PIM-based baseband processor achieves fully parallel operation and significantly reduces processing latency, making it well suited to the stringent performance requirements of next-generation wireless systems. The presented architecture demonstrates the potential of PIM technology as an effective solution for future high-performance and energy-efficient baseband processing platforms.