A Hardware-Friendly 16-Bit Fixed-Point Quantization Training Algorithm for CNNs

As Convolutional Neural Networks (CNNs) continue to grow in scale, their large number of parameters increasingly constrains training on edge devices. Therefore, quantization algorithms have attracted significant research attention as a method to reduce memory resources. To further overcome the limitations in throughput and resource of existing quantization algorithms, this paper presents a hardware-friendly 16-bit fixed-point (Fix16) quantization training algorithm. By reducing the numerical bit-width, the algorithm lowers hardware resource consumption, which allows more operations to be executed under the same resource. This increases parallelism and consequently leads to higher throughput. Firstly, we design a fixed-point quantizer capable of converting floating-point data into fixed-point. Moreover, to further integrate the quantizer into CNN training, we design a quantization training scheme based on the computational characteristics of each training stage. Experimental results demonstrate that, compared with full-precision and integer quantization algorithms, the proposed algorithm reduces training loss by up to 7.65% and improves accuracy by up to 0.80%. Meanwhile, hardware measurements show that the proposed algorithm reduces power consumption by 50.30%, achieves a throughput of 182.15 GOPS, and improves energy efficiency by $1.44 \times$ compared to the baseline.