A Power-Efficient, High-Speed IP Lookup Architecture Using Adaptive Vector Coupled Tries

Efficient IP address lookup is a growing challenge due to the rapid expansion of routing tables and evolving network demands. Traditional methods like Ternary Content Addressable Memory (TCAM) offer fast lookups (5 ns) but are limited by high power consumption (5.5 W), poor memory efficiency (500 MB), and scalability constraints (512K entries). Trie-based alternatives such as General and Multi-bit Tries improve scalability but suffer from slower speeds (50–80 ns) and high memory overhead (250 MB). This study introduces an adaptive enhancement to the Vector Coupled Trie (VCT), which dynamically reorganizes trie nodes based on real-time lookup patterns and incorporates Bloom Filters to minimize redundant memory access. The proposed model achieves a 70