A Security-Driven FPGA Application Development Workflow Based on GCN Algorithm

As the complexity of integrated circuit designs increases and the supply chain becomes more globalized, the threat of hardware Trojans has escalated, posing higher security requirements for Electronic Design Automation (EDA) software. This study introduces an FPGA integrated development environment and FPGA application development process that incorporates a hardware Trojan detection algorithm. It extracts features from the netlist after FPGA synthesis and utilizes Graph Convolutional Networks (GCN) to process the rich structural features in the netlist. To address the issue of imbalanced datasets, we incorporate the GraphSMOTE technique to enhance the model's generalization capability by synthesizing minority class samples. In the classification phase, an optimized GCN model is employed to determine whether each node is a Trojan node. Comparative experiments with several other models demonstrate a significant improvement in detection accuracy, achieving the highest F1 score and a high True Positive Rate (TPR), thereby validating the effectiveness and superiority of the GCN -based method in the field of hardware Trojan detection. This study not only enhances the security of the FPGA application development process but also provides new insights and tools for subsequent research in hardware security.