Accelerating PDEs with Chiplet-Based Processing Chains | AMiner
Accelerating PDEs with Chiplet-Based Processing Chains
Jeff Anderson,Tarek El-Ghazawi
2024 IEEE INTERNATIONAL CONFERENCE ON REBOOTING COMPUTING, ICRC(2024)
George Washington Univ
被引用0|浏览0
摘要
Innovative accelerator architectures aim to play a critical role in future performance improvements under ceilings imposed by the end of Moore’s Law. Analog mesh computers are a class of such accelerators, designed to minimize time-to-solution by solving partial differential equations in one shot. However, the limited programmability of analog mesh computers does not support the PDE-solver requirement to match arbitrary PDE mesh shapes. In this work, we introduce a chiplet-based architecture capable of solving arbitrary PDE mesh shapes by chaining neural network acceleration chiplets and analog mesh computers. Specifically, we use physics-informed neural networks to infer the values at the perimeter of the analog mesh computer, and then use the analog mesh computer to solve for the remainder of the PDE. We then investigate resource scheduling strategies for the chiplet-based PDE acceleration architecture. Additionally, we propose a figure of merit that enables comparisons between classes of PDE accelerators. We show that the chiplet-based accelerator shows a speedup of 2x when compared to existing solutions.