Decoded Instruction Cache for Variable Instruction-Length Computer

Intrater, G.,Spillinger, I.

The Sixteenth Conference of Electrical and Electronics Engineers in Israel,

Department of Electrical Engineering

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摘要

A Decoded Instruction Cache improves the performance of pipalined computers. In order to build the cache, several non-obvious decisions have to be taken. This work shows the benefits of using such a cache and studies the behavior of a Decoded Instruction Cache in order to find the best structure at a given cost.

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